Managing Your Controlled Impedance: A Guide
In the realm of printed circuit board (PCB) manufacturing, controlled impedance PCBs play a crucial role in high-speed and radio frequency (RF) designs. These boards require precise specifications to ensure signal integrity and reliable performance. Here are the key steps to specifying controlled dielectric materials and stack-ups for controlled impedance PCB manufacturing.
Step 1: Identify Critical Signals and Required Impedance
First, determine which signals need impedance control, such as high-speed data or clock lines, and specify the target impedance based on signal requirements or industry standards, often around 50Ω for single-ended or 90/100Ω for differential pairs.
Step 2: Select Dielectric Material with Appropriate Permittivity and Low Loss
Choose dielectric materials with stable and well-characterized dielectric constants and low dielectric loss tangent to maintain signal integrity. For RF and high-frequency boards, materials like Rogers RO4003, RT/duroid, or Teflon-based laminates are preferred over FR4 due to their lower loss and more stable dielectric properties.
Step 3: Specify Layer Stack-Up and Dielectric Thickness
Clearly define the PCB stack-up—thickness and order of dielectric layers and copper planes—since the dielectric thickness and permittivity directly influence the impedance. Impedance is highly sensitive to the distance between signal traces and reference planes within the dielectric layers.
Step 4: Provide Trace Geometry Guidelines
Specify trace width, thickness, and spacing explicitly. Controlled impedance traces should have unique widths to distinguish them from other signals, assisting manufacturers in impedance tuning during fabrication.
Step 5: Include Manufacturing Process Controls
Ensure the PCB manufacturer understands the controlled impedance requirements and has the capability to control dielectric thickness and material consistency tightly during fabrication to meet impedance tolerances. Communicate required impedance tolerance levels—often ±10% or better—and request manufacturers perform verification measurements like time-domain reflectometry (TDR).
Step 6: Call Out Relevant Standards and Classes
Reference industry standards that dictate minimum mechanical and electrical tolerances to support stable impedance, such as via pad sizes, annular rings, and trace tolerances, especially for high-reliability Class 2 or Class 3 PCBs.
Step 7: Simulate and Validate
Use signal integrity tools and electromagnetic simulation software before manufacturing to predict impedance and optimize dielectric specification and layout. After fabrication, validate the impedance using TDR or similar testing methods.
Additional considerations for RF PCBs include minimizing via usage, maintaining continuous ground planes, and ensuring proper shielding to reduce interference, which can influence dielectric material requirements and layout decisions.
In the manufacturing process, press-out thicknesses for controlled impedance PCBs are planned based on the amount of resin in the prepreg and the copper area and thickness of copper on the opposing layers. To achieve controlled impedance, the designer can specify the dielectric thicknesses in the fabrication drawing or specify the layers in which the impedance lines are desired and the target ohms.
In HDI PCB manufacturing, the manufacturer has a restriction on the height of copper based on the spacing requirements. The manufacturer's cross-section technician measures dielectric thicknesses depending on the trace location, either inner layer or outer layer. Some customers choose to use a core construction over a foil construction to eliminate the variation in dielectric height, but this is not always possible, such as in HDI PCB manufacturing.
Upon failure, a cross-section of the impedance coupon is taken to investigate the deviation from the calculated impedance to the recorded impedance. It is recommended not to use more than three different types of prepregs in a stackup, and the dielectric thickness of each prepreg layer should be less than 10 mils to avoid greater variation in the final thickness.
For modeling impedance on HDI designs, the thickness of the dielectric is controlled by the aspect ratio of the microvia. The trace width is estimated from the bottom as well as from the top of the affected impedance trace, along with the copper thickness or the trace height. The impedance of traces in controlled impedance PCBs is defined by trace width (W), thickness (T), height (H) from the ground plane, and the dielectric of the PCB material.
The designer needs to know the number of board layers, layers on which to route controlled impedance traces, layers to use as reference layers, PCB materials used and copper thicknesses on various layers, dielectric constant and dielectric height (when modeling themselves) to calculate the trace values for differential pairs and single-ended nets. The manufacturer performs a test using TDR coupons to ensure that the desired impedance can be achieved.
A multilayer PCB manufacturing requires two forms of PCB materials: cores and prepregs. Cores are fully-cured materials, while prepregs are semi-cured materials used as a bonding material. Cross-section analysis is performed on the panel to ensure good connection to inner layers and even copper wrap throughout the hole. Better tolerances can lead to better performances in controlled impedance PCBs.
When it is a differential pair, the spacing between the two traces is measured to understand whether or not the projected impedance is in alignment with the recorded impedance. The final thickness of a prepreg material depends on the percentage of the copper in the adjoining conducting layers, the height of the copper in these layers, and the type of the prepreg used.
Sierra Circuits uses test coupons to ensure there are no variations in trace width, trace thickness, and so on, in the manufactured boards. Upon failure, a cross-section of the impedance coupon is taken to investigate the deviation from the calculated impedance to the recorded impedance.
Step 8: Leverage Impedance Calculator Tools
Utilize impedance calculator tools to model and determine the impedance effects of trace geometry, layer stack-up, and dielectric material properties for controlled impedance PCB designs.
Step 9: Monitor Dielectric Material Compatibility for Technology Integration
Ensure the selected dielectric material is technologically compatible with other materials used in the PCB, such as soldermask andChemical Mechanical Polishing (CMP) materials, to avoid any adverse interactions that may affect impedance performance.
